International Publication No. WO2007/069606 describes a semiconductor package formed by arranging an electronic component between an upper substrate and a lower substrate and surrounding the electronic component with an encapsulation resin. A known method for manufacturing such a semiconductor package will now be described.
For example, as shown in FIG. 17, a large substrate 72 including a block 71 with a plurality of (7×4 in FIG. 17) lower substrates 70 is first prepared, and an electronic component such as a semiconductor chip, a passive component, or the like is mounted on each lower substrate 70. Then, a large substrate 81 including a plurality of (7×4 in FIG. 17) upper substrates 80 is prepared, and a solder ball is bonded to a connection pad of each upper substrate 80. The solder ball is then bonded to a connection pad of each lower substrate 70, and the large substrate 81 is mounted on the large substrate 72 so that each upper substrate 80 is mounted on the corresponding lower substrate 70 by way of the solder ball. The space between the substrates 72 and the substrates 81 is filled with an encapsulation resin. Dicing is performed to cut and singulate the substrates 72, the substrates 81, and the encapsulation resin. This manufactures semiconductor packages.